Part 4 · Computer Design · levels 44–47

The fourth part is independent design: you define the instruction set, build the control unit, wire up peripherals and export a project that builds on a real Tang Nano 9K board.

Open in the game →Course curriculum

The main ideas of the part

  • The control unit is a large decoder without memory: an opcode in, control signals out.
  • You invent the instruction set yourself: the decoder defines what an instruction means, not the gates.
  • Memory-Mapped I/O: LEDs and switches use the same addresses as RAM — to the processor there is no difference.
  • ZIP export is a project for a real FPGA: synthesis, routing, flashing the board.

What you will have built by the end

By the end of the part you will have a ready project of your own computer — with a control unit, a custom instruction set and peripherals — for a real Tang Nano 9K board.

Levels of the part

  1. 44. Control Unit — design a control unit: opcode decoder → control signals Open in the game →
  2. 45. My ISA — design an ALU operation selector: a 2-bit code decoder and a MUX choose one of three operations Open in the game →
  3. 46. Memory-Mapped I/O — explain memory-mapped I/O and implement LED/switches with a write-enable register Open in the game →
  4. 47. Create Computer — instantiate a complete computer and export it to a real FPGA (ZIP, pin mapping) Open in the game →

Each level number leads to its library guide; "Open in the game" goes straight to the level in the simulator.

Up next: Part 5 · RISC Microarchitecture → · the RISC Microarchitecture hub → · the Verilog and FPGA hub →