Level 21: Pointers
Task
Add Index Register (IX) for indirect addressing. Implement LDX, LDAX, STAX, INX in the decoder.
This level adds an Index Register (IX) — a special register for indirect addressing.
Related Materials
- IndexRegister (IX): indirect addressing
- RAM: random access memory
Solution
IX lets you access memory at an address stored in the register itself (not in the instruction operand). This is useful for arrays and tables.
Physically a "pointer" is a switch: the BusMUX selects the data source for ALU8.B between RAM.DataOut and IX. When Sel=1, the CPU sees on the data bus not the RAM contents at the operand address but the value from the index register — as if it "looks at the register rather than the operand". The address bus does not change — only the data source in the ALU path does.
Tasks: 1. BusConstant = 2 → PC.Inc (same as levels 19-20). 2. ROM#1.Q → RAM.Addr (same as level 20). 3. Route data to ALU8.B (port 1). Use BusMUX: RAM.DataOut → BusMUX.A, ROM#1.Data → BusMUX.B. Leave Sel untouched for now (Sel=0 selects RAM, Sel=1 will select IX later).
IX is already connected to the clock signal. On levels 27-29, IX is fully functional and controlled by instructions: - LDX N — load IX with value N - INX — increment IX by 1 - LDAX — load Acc from RAM[IX] - STAX — store Acc to RAM[IX]
