Level 21: Pointers

Open the level →Where it fits in the machine →

Task

Goal: Route data to ALU8.B through the BusMUX: RAM → A, operand from ROM#1 → B. Note: IX is intentionally NOT wired on this level — its path is the address path (RAM.Addr), not the data bus. It activates later: address-source selection via addrmux arrives on levels 23+, and the first IX tasks are levels 27–29.

This level adds an Index Register (IX) — a special register for indirect addressing.

The main idea: an address can be data: IX holds the address the processor reads the operand from, opening indirect addressing — memory access by pointer instead of by a baked-in constant. That is how array work enters the machine.

Related Materials

Solution for self-check

Try building the circuit yourself first. The solution below is a way to check yourself if you're stuck or have already solved it.

What you should get: with Sel=0, ALU8.B receives data from RAM and the operand comes from ROM#1 — the level 19–20 circuit is preserved.

IX lets you access memory at an address stored in the register itself (not in the instruction operand). This is useful for arrays and tables.

Physically a "pointer" is a switch: the BusMUX selects the data source for ALU8.B between RAM.DataOut and IX. When Sel=1, the CPU sees on the data bus not the RAM contents at the operand address but the value from the index register — as if it "looks at the register rather than the operand". The address bus does not change — only the data source in the ALU path does.

Tasks: 1. BusConstant = 2 → PC.Inc (same as levels 19-20). 2. ROM#1.Data → RAM.Addr (same as level 20). 3. Route data to ALU8.B (port 1). Use BusMUX: RAM.DataOut → BusMUX.A, ROM#1.Data → BusMUX.B. Leave Sel untouched for now (Sel=0 selects RAM, Sel=1 will select IX later).

IX is already connected to the clock signal. On levels 27-29, IX is fully functional and controlled by instructions: - LDX N — load IX with value N - INX — increment IX by 1 - LDAX — load Acc from RAM[IX] - STAX — store Acc to RAM[IX]

Assembler help →

Solution circuit for level 21 — Pointers
The authored solution for level 21 in the simulator (dark theme)

Check yourself

Why is IX not wired to the data bus on this level?

IX’s path is the address path (RAM.Addr), not the data bus; BusMUX with Sel=1 will wire it to the data later — the first IX tasks are levels 27–29.