RAM

Inputs

Outputs

How It Works

RAM is a wall of 256 lockers, each with its own number from 0 to 255. The address on the Addr input says which locker we are working with, and the WE input is the key: with WE = 1 the locker is open and the value from DataIn lands inside; with WE = 0 the door is locked and the memory simply shows what is stored there.

The key property: DataOut always reflects the contents of cell Addr. Write the number 42 into cell 7 (Addr = 7, DataIn = 42, WE = 1), then switch to reading (WE = 0) — the same 42 appear on the output. A cell holds its value until something new is written: the memory "remembers" without any clocking and updates the moment the inputs change.

A nuance: at the start of the simulation all 256 cells are filled with zeros, so reading before the first write returns 0. And one more subtlety: the instruction operand directly addresses only cells 0–15, while distant addresses are reachable through the IndexRegister — that is covered in levels 20–22.

Examples

Note step 4: the old value disappears without a trace — a cell keeps no "history". The program itself must track what it writes and where.

Usage

RAM is the processor's data memory, the second half of the Harvard architecture: while instructions live in ROM, variables and results are stored here (levels 18, 20–22, 25–29). The LDA and STA instructions are RAM reads and writes: load a value from a cell into the accumulator, store the accumulator into a cell. On level 20 you will learn to read and write memory within one clock cycle, and in the Verilog part (level 39) you will build your own RAM256.

Concrete examples: a step counter that the program increases with ADD and saves back; the snake's coordinates on level 29 — every body segment lies in its own cell; intermediate results of long calculations. Everything that programming languages call a "variable" lives exactly in these RAM cells.