Level 22: Bus Conflict

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Task

Goal: Fix the data bus conflict: RAM and Gamepad both drive the bus. Add AddrDecoder and BusAND to gate the RAM output.

When two devices (RAM and Gamepad) share the data bus, a CONFLICT occurs: both try to output data simultaneously.

The main idea: every device on the bus needs its own window in the address space: the address decoder gates the outputs so only one device talks at any moment. The bus is a shared road, and the decoder writes the traffic rules.

Path to this level

The competencies this level develops and their formation levels.

NAND universality · ур. 2, 3, 4, 5 Boolean composition · ур. 3, 4, 5 Feedback and latch · ур. 10 Clock and flip-flop · ур. 11, 12, 15 Adder and carry · ур. 6, 7, 8 Register and counter · ур. 12, 15, 16 Multiplexer · ур. 9, 13 ALU architecture · ур. 14 CPU · ур. 17, 18, 19, 20, 21 Structural Verilog Bus and memory Fault localization

Related Materials

BusAND: bus conflict prevention
BusOR: bitwise OR
AddrDecoder: address decoder

Solution for self-check

Try building the circuit yourself first. The solution below is a way to check yourself if you're stuck or have already solved it.

What you should get: for an I/O-zone address the RAM data is masked off the bus and the conflict is gone: gamepad buttons read correctly.

The data bus is a bundle of copper wires where only one device may "shout" at a time. If RAM and the gamepad drive the bus simultaneously, that is a short circuit: the signals physically fight on the wires. BusAND fixes it electrically: it "mutes" the inactive device by ANDing its data with a zero mask — silence reaches the bus.

AddrDecoder solves this: - Addresses 0–223 (0x00–0xDF) → RAM (RAM_SEL=1) - Addresses 224–255 (0xE0–0xFF) → I/O devices (IO_SEL=1)

AddrDecoder outputs two signals: - RAM_SEL8 (bus8) — mask for RAM data (0xFF when RAM, 0x00 when I/O) - IO_SEL (bit) — I/O port access flag

Tasks: 1. BusConstant = 2 → PC.Inc. 2. ROM#1 → RAM.Addr. 3. ROM#1 → AddrDecoder.Addr (so the decoder knows which address is being accessed). 4. Connect data bus to ALU8.B: RAM.DataOut → BusAND.A, AddrDecoder.RAM_SEL8 → BusAND.B, then BusAND.Q → BusOR, then to ALU8.B.

This cascade (RAM → BusAND → BusOR) masks RAM data when the address belongs to an I/O device — resolving the bus conflict.

Assembler help →

Solution circuit for level 22 — Bus Conflict — The authored solution for level 22 in the simulator (dark theme)

Check yourself

What happens if you remove the BusAND from the RAM chain?

RAM and the gamepad would drive the bus simultaneously again — a bus conflict with distorted values.