Level 20: Dual Read
Open the level →Where it fits in the machine →
Task
Goal: Wire the second ROM (operands): its address from the PC, its output to the RAM address input. PC steps by +2.
In word format, each instruction takes 2 bytes. The first ROM holds opcodes, the second ROM holds operands.
The main idea: one address, two streams: the PC reads the opcode from ROM#1 and the operand from ROM#2 in parallel, and an instruction is assembled within one cycle. Splitting instructions and data makes fetching simpler, not harder.
Path to this level
The competencies this level develops and their formation levels.
Related Materials
- RAM: random access memory
Solution for self-check
Try building the circuit yourself first. The solution below is a way to check yourself if you're stuck or have already solved it.
What you should get: LDA/STA fetch the operand from the second ROM — instructions work with 8-bit addresses.
Both ROMs are addressed by PC (which steps by +2). This means: - ROM[0] outputs the opcode (high byte of instruction), - ROM#1 (second ROM) outputs the operand (low byte).
Tasks: 1. BusConstant = 2 → PC Inc input (same as level 19). 2. ROM#1.Data → RAM Addr input. This routes the instruction operand to the RAM address input — now LDA/STA will work with 8-bit addresses.
Tip: ROM#1 (second ROM) is located below the first ROM on the canvas. Its output pin is labeled Data.
Check yourself
Why a second ROM if the first one is also addressed by the PC?
The first holds opcodes, the second holds operands: the PC reads both instruction bytes in parallel within one cycle.