Level 48: Goodbye, Accumulator!

Open level →

Task

Goal: compare two machines: an accumulator one (every operation pushes data through ACC three times) and a register one (a RegFile of 32 cells). Complete all widget tasks — and try writing 42 to x0: it will stay zero.

The first RISC Lab level has no circuits and no code. In front of you is an interactive widget with two machines: on the left, the familiar accumulator processor from Part 2; on the right, a register machine with a file of 32 registers, 32 bits each. Complete the four widget tasks and answer the level question.

In the accumulator architecture, one side of every arithmetic operation is tied to the ACC register. The command ADD x5 reads ACC, adds x5 to it and writes the result back to ACC. Data passes through the same register three times per instruction — that is the bottleneck.

In the register architecture, an instruction names both sources and the destination explicitly. The three-operand command ADD x5, x6, x7 means: read x6, read x7, add them, write the sum to x5. No register is privileged — except one.

Widget tasks:

  1. Run the addition on the accumulator machine — the ACC pass counter grows by 3.
  2. Write 42 to x5 on the register machine and read the value back.
  3. Try to write 42 to x0 — and make sure it stays zero.
  4. Read x5 through both ports at once — the register file supplies both operands in one cycle.

Solution for self-check

First complete the experiments in the widget. The solution below will help you check your understanding.

What you should get: all four widget tasks are done: the addition is run (the ACC pass counter grows by 3), 42 is written to x5 and read back, a write to x0 leaves it zero, and the two read ports return x5 at the same moment.

x0 is not a register but a constant. Zero is needed so often that RV32I made it free: the bits of x0 are hardwired to zero, and the write decoder never selects it. A write to x0 does not change its value — not because the processor resets the register every cycle, but because x0 has no write path at all.

Two read ports. The register file supplies two different registers at the same time — this is required by instructions such as ADD x5, x6, x7: both operands must reach the ALU in one cycle.

Comparing architectures. Count the passes through ACC in a short program: every arithmetic instruction adds three (read ACC, write ACC, plus reading the operand from memory or a register). In the register machine data goes directly from register to register — ACC is not in the chain.

After all four tasks, a concept check opens: why does a write to x0 disappear? The correct answer is the first one: x0 does not physically exist as a register; its bits are grounded.

Related materials

Check yourself

Why does a write to x0 simply vanish, even though it looks like an ordinary register?

x0 has no write path: its bits are physically grounded, and the write decoder never selects it. The zero constant comes free in every instruction — so x0 zeroes values without extra instructions.