From Transistor to Logic Gate: Where Logic Is Born

In the simulator, gates are ready-made bricks: drag a NAND in, connect wires, done. But behind every such brick in a real chip stand transistors — tiny electrically controlled switches. This article walks the path from a single switch to a logic gate: those "magical" truth tables turn out to be plain electric circuits that either conduct current or don't.

Transistor = switch T ground input gate open — current flows down A NOT inverter from two transistors VCC (1) T1 (pMOS) output Q T2 (nMOS) ground (0) input A
A transistor is a voltage-controlled switch. A pair of them makes a NOT gate: input 0 opens the top switch, pulling the output up to 1; input 1 opens the bottom one, dropping the output to 0

A transistor is a switch that clicks by itself

An ordinary switch clicks under a finger. A transistor clicks under voltage: apply a high voltage to its control terminal (the gate) and the channel opens, letting current through; remove the voltage and the channel closes. Switching takes nanoseconds and the "click" barely spends any energy — which is why a processor can hold billions of transistors.

The key convention of all digital technology: high voltage is called 1, low voltage is 0. Everything else is just a matter of connecting switches.

From switches to a NOT gate

A NOT inverter is built from two transistors of different types: the top one (pMOS) opens on zero, the bottom one (nMOS) opens on one. They work crosswise:

— Input 0: the top switch is open, the bottom one is closed. The output connects to the supply — the output is 1.
— Input 1: the top is closed, the bottom is open. The output connects to ground — the output is 0.

There is no third state: one of the switches is always open. The circuit physically implements the NOT truth table — there is no "logic magic" in it, just two switches and two wires.

NAND: a two-story switch

Now let's complicate things: put two nMOS transistors at the bottom in series (one above the other), and two pMOS in parallel at the top. The resulting gate pulls the output to zero only when both bottom switches are open — that is, when A = 1 and B = 1. In every other case at least one top switch is open and the output is held at one.

This is NAND — an AND followed by a NOT. Four transistors produce a whole row of the truth table. A NOR works the same way: two nMOS in parallel and two pMOS in series.

Why all technology stands on NAND

CMOS manufacturing is tuned for "top switch + bottom switch" pairs, so NAND and NOR are cheaper to make than other gates. And as the article on De Morgan's laws and the universality of NAND shows, any circuit can be built from NAND alone: NOT is a NAND with tied inputs, AND is a NAND plus an inverter, OR is an inverter in front of a NAND.

That is why NAND is the first "real" gate in the course, and level 3, "Perfect Pair", asks you to build an AND from what you already have. You are retracing the path real circuit design traveled over half a century: from a switch to computation.

Test yourself

What does a transistor do in a digital circuit?

It acts as a voltage-controlled switch: the voltage on the gate opens or closes the channel that the current flows through.

How many transistors does a CMOS NOT inverter need?

Two: a pMOS on top (pulls the output to 1) and an nMOS below (pulls the output to 0). They open crosswise, so the output is always in one of the two states.

Why does NAND appear in chips more often than other gates?

In CMOS a NAND is just four transistors, and any other circuit can be built from it. Cheap to manufacture and universal for design.

Try it in the simulator →