NOR
Inputs
| Pin | Type | Description |
|---|---|---|
| A | bit | First input signal |
| B | bit | Second input signal |
Outputs
| Pin | Type | Description |
|---|---|---|
| Q | bit | 1 only when A=0 and B=0 |
How It Works
NOR reads as "neither one nor the other": first an ordinary OR, then an inversion. While the inputs are silent — all zeros — the output is one. It is a guard saying "all clear": the alarm stays quiet only when both the door and the window are closed.
The key property of NOR: the output is 1 in exactly one case — when both inputs are 0. Any one on an input extinguishes the output. Example: a full-shutdown detector — when no device is active, the circuit may safely go to sleep.
The real magic starts with feedback. Cross-connect two NOR gates — each output into the other's input — and you get an SR latch: a circuit that remembers which input was active last. It is no longer an instant "calculator" but the first memory cell. You will build exactly that at Level 10.
Truth Table and Examples
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
Example of a guard: both limit switches are open (0 and 0) — the NOR output lights the "Doors closed" lamp. Open any door and the lamp goes out: in the truth table, a one on an input immediately produces a zero on the output.
Usage
NOR takes center stage at Level 10, the SR latch: two cross-connected gates remember one bit — the first step from logic to memory. The same principle grows through the D flip-flop (Level 11) into registers and all the RAM of a computer.
Like NAND, NOR is a universal gate: from it you build NOT (joined inputs), OR (NOR plus NOT) and AND (via De Morgan). In real electronics, entire simple controllers were built from NOR logic: one gate type means simpler manufacturing. In the game it is your fallback path: no suitable gate in the palette? Assemble it from NOR.
Interactive Demo
Click inputs to toggle value (0 / 1)
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Frequently Asked Questions
Why is NOR also called universal?
Like NAND, NOR can build every other gate, and two NOR gates form an SR latch.
How does NOR differ from OR?
Only by the inverted output: where OR would give 1, NOR gives 0, and vice versa — the truth table is mirrored.
What happens if R=S=1 on an SR latch made of NOR?
That is the forbidden combination: both outputs drop to 0, and after the signals are released the latch settles unpredictably into one of its states.