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Basics

Already familiar with logic gates? Take the placement test: 19 questions and 3 hands-on tasks (~10–15 minutes). Based on the result, levels 1 through 30 unlock (without completion marks) — you can start at an advanced level right away. Retakes are allowed: the floor can only go up. Note that the placement test does not mark levels as completed — certificates require real completions.

New to the subject? The circuit design hub explains what the field is, what a circuit is made of, how it differs from programming, and what to read next — a good start before the first level.

Signal visualization

Wires on the canvas change color depending on the signal they carry:

• Orange — active bit signal (logic 1)
• Gray — inactive signal (logic 0)
• Blue — active 8-bit bus (value > 0); dark blue — inactive (value 0)

Active wires also show flow dots — small circles moving along the line. They indicate the direction of signal propagation: from a component's output to another's input.

You can toggle input nodes (Input / Bus Input) directly on the canvas without running a test. Click the «0» circle on an input — it switches to «1», the signal instantly propagates through the entire circuit, and all wire colors update. This is great for debugging: manually flip inputs and watch how the circuit responds, without waiting for a full verification.

Error highlighting

When you press ▶ (Run Test), the circuit is checked against the truth table. If any row's expected output doesn't match the actual value:

• The wire leading to a failing output turns red with a bright glow
• The output node itself is highlighted in red with an outer ring

Error highlighting stays until you modify the circuit (add/remove a component or connection) or run the test again. When all tests pass, the highlighting clears automatically.

«Info» tab

The right panel has an «Info» tab. Select any component on the canvas — its description, category, and truth table appear in this tab. A handy reference: no need to search for documentation — all gate info is right there.

Truth table

A timing diagram is displayed above the truth table. Columns are separated by dashed lines — each clock cycle is distinct.

Hover a row in the table below — the corresponding column highlights on the diagram. Hover a column on the diagram — the corresponding row highlights in the table. This helps match expected and actual values to time intervals. Learn more about timing diagrams →

Test vectors

Each row of the truth table is a test vector: a set of input values and expected output values. When you press ▶ (Run Test), the simulator applies the inputs from the current row, propagates signals through the entire circuit, and compares actual outputs against expected values.

• Combinational levels — all vectors are checked independently: for each row the circuit resets, inputs are applied, outputs are computed. Row order does not matter.
• Sequential levels (with a clock signal) — vectors are applied sequentially, one after another, without resetting state between them. The circuit "remembers" previous steps — just like a real digital circuit with memory. Rows with the special inClock field mark a clock edge: at that moment, flip-flops and registers capture input data.
• Verilog levels — same principles, but checking runs through the Verilog simulator. For sequential designs, the waveform viewer visualizes signal history: inputs, outputs, and internal wires.

A test status appears below the table: green — all vectors passed; red — mismatches found. For failed rows, the "Exp" / "Act" columns show which bits didn't match. Click a failed row to expand a dump of all internal signals — useful for debugging.

Clock control

On levels with memory and feedback loops (10–12, 16+), a «Clock Control» panel appears in the right sidebar. Purely combinational levels (13–15) have no clock — the panel hides. In «Sandbox» mode, Clock Control is always available.

• ▶ / ⏸ — start / pause automatic clocking. The graph updates at the selected frequency.
• ⏭ — single step: advance exactly one clock tick. Great for debugging — see how state changes after each step.
• Hz — speed slider: from 1 to 100 steps per second. Higher is faster.
• Ticks — tick counter. On the CPU level (16), this is the number of executed instructions.

Step mode (⏭) helps you understand what the circuit does: one click, one tick. Automatic mode (▶) verifies that the circuit runs stably over time.

Controls

• Drag an element from the component bar onto the canvas
• Drag from an element's port — create a connection
• Delete — remove the selected element
• Mouse wheel — zoom in/out
• F9 — run circuit verification
• Ctrl+Shift+F — open search for components and theory

Search components and theory

Press Ctrl+Shift+F (Cmd+Shift+F on Mac) or click the Search button in the toolbar to open the command palette — a Spotlight-style search panel.

Start typing a component name, article title, or level — the panel instantly finds matches among:

• Components (datasheets) — NAND, Half Adder, registers, ALU, and more
• Library articles — from «Introduction to Circuit Design» to «Timing Diagrams»
• Level guides — step-by-step walkthroughs for all 47 levels

Navigate with ↑↓ arrows, press Enter to open — a component opens in the «Info» tab, an article or guide opens in a new tab.

Hints

Each level offers two hint levels. Press the button in the toolbar. The first hint shows a solution guide and warns about the transistor penalty. The second hint inserts the complete solution onto the canvas and deducts transistors from your game balance.

Modes

• Tasks — progress through levels in order with verification
• Sandbox — free experimentation in two variants: "Circuit" (all unlocked elements) and "Verilog" (circuits from code) — see the Sandbox section

Sandbox

The Sandbox is a free-building mode: no task, no truth table, no verification (F9 is disabled) — but all base components are available right away: gates, bus operations, registers, the ALU, memory, the display, the gamepad and the random number generator.

• Recipes. An empty canvas shows a welcome overlay with five ready-made circuits: "Clock Beacon", "Half Adder", "0–255 Counter", "Random Number Generator", "Running Light". Clicking a card builds the circuit instantly — a convenient starting point for experiments.
• Clocking. The Clock Control panel is always available: ▶ — continuous clock, ⏭ — single tick, the slider sets the speed from 1 to 100 Hz. Registers, DFF, the program counter and the RNG change state on the clock edge.
• "Assembler" tab. Appears automatically when a ROM is on the canvas. Programs use the byte format: one instruction — one byte ([7:4] opcode, [3:0] operand). The "Run" button compiles the text into ROM memory and starts the clock. Build a minimal computer from a ROM, a program counter and registers — or load the "Running Light" recipe and rewrite its program. More about the assembler →
• Display. Double-clicking a display cycles the number format: decimal, binary or hexadecimal.
• Saving. The circuit autosaves in the browser and is restored the next time you enter the mode. The 🗑 "Clear canvas" button removes everything and shows the recipe cards again.
• AI Tutor. In the sandbox the tutor works as usual: explains components, suggests experiment ideas and answers questions about the mode's capabilities and the assembler.

The "Verilog" variant. The Sandbox button opens a "Circuit / Verilog" menu — switching preserves the state of both modes. The Verilog variant offers the same freedom, but the circuit is described in code: the Verilog editor on the left, the RTL Viewer building a schematic from the code on the right.

• Language. Structural Verilog is supported: module, input/output/wire (including buses), the and/or/not/xor/nand/nor primitives, dff (q, d, clk) and generate-for. Behavioral constructs (always, if, case, reg, assign) are not supported. The clock input is named clk, and all dffs are clocked from it.
• Recipes. An empty sandbox offers five ready-made examples: "Half Adder", "Blink (T flip-flop)", "4-bit Counter", "MUX 2→1", "Running Light". Clicking a card inserts the code into the editor.
• Running. Buttons ⏭ (one tick), ▶ (continuous) and ⟲ (reset); F9 also steps once. Results appear as a waveform: inputs, outputs and internal signals after each tick.
• "Inputs" panel. Every input port of the top module (except clk) gets a control: a toggle for 1-bit inputs, a hex stepper for buses. Values are applied to the circuit before each tick.
• Saving. The project autosaves and is kept separately from the circuit sandbox. The 🗑 button restores the empty project and shows the recipe cards again.
• AI Tutor. Knows the mode's capabilities: explains primitives and dff, helps read the waveform and suggests structural techniques.

AI Tutor

The right sidebar has an «AI Tutor» tab — an AI assistant that analyzes your circuit, finds errors, and asks guiding questions in a Socratic style. 30 requests per day are available.

Shortcut buttons send common requests:

• Check circuit — find errors without giving a solution
• Explain level — rephrase the task in simple terms
• I give up — show a step-by-step solution

AI Tutor can make mistakes. Do not blindly trust it — double-check results.

Game Economy

Completing levels successfully earns you the in-game currency — Transistors (T). The currency serves as a scoring system and is not spent on anything.

• Level reward depends on difficulty: easy levels (1–5) give +50 T, medium (6–11) — +100 T, hard (12–29) — +150 T.
• Hint penalty: using the ready-made solution (2nd hint) deducts an amount equal to the reward, with a minus sign (e.g., −50 T). Your balance can go negative.
• Re-grade: if you passed a level with a penalty, then reset it and built the circuit on your own — the penalty is refunded, and the full reward is granted. The system rewards learning!

Your current balance is displayed in the top bar (next to the «Tasks» and «Sandbox» buttons). Clicking the balance opens the Engineer Profile — a table with your full completion history: which levels are done, when, how many hints used, and how many transistors earned.

Library

Detailed materials are available in the Library:

• Level Guides — step-by-step solutions for all 47 levels
• Assembler Manual — complete instruction set documentation
• Circuitry Articles — logic gates and fundamentals

An AI tutor is available on library pages: highlight any passage and click "Ask a question" — the tutor will explain it in the context of the article. Or open the chat with the floating button at the right edge and ask anything. The daily request limit is shared with the game — 30 per day.

Tools

Besides the game there are standalone browser tools that help when working with truth tables:

• Truth Table Generator — a full table for a Boolean formula
• Boolean Function Calculator — PDNF, PCNF, the Zhegalkin polynomial, Post classes, minimization and a Karnaugh map with step-by-step solutions
• Logic Circuit Simulator — a standalone page with a canvas for free experiments