How to Build Logic from NAND

Nine simulator elements, from an inverter to a D flip-flop, are built from NAND gates alone. Each card has a circuit, a price in gates and transistors, and a real 74-series chip. If you have not passed levels 3–5 yet, try building NOT, AND, and OR yourself first: that is the task there.

NOT (Inverter)

The NOT (Inverter) circuit made from 1 NAND gates

From NAND: 1 gate, ≈ 4 transistors.

In silicon: ≈ 2 transistors. In the 74 series this is the 7404 — 6 inverters per package.

Both inputs of one NAND are tied together. With a 0 at the input the NAND sees two zeros and outputs 1; with a 1 it outputs 0.

In silicon an inverter takes 2 transistors — one p-channel and one n-channel. Four NAND gates are not needed.

AND

The AND circuit made from 2 NAND gates

From NAND: 2 gates, ≈ 8 transistors.

In silicon: ≈ 6 transistors. In the 74 series this is the 7408 — 4 two-input AND gates.

NAND answers "not both", so its output is inverted by a second NAND with tied inputs. The result is "both".

AND in silicon is a NAND plus an inverter, about 6 transistors.

OR

The OR circuit made from 3 NAND gates

From NAND: 3 gates, ≈ 12 transistors.

In silicon: ≈ 6 transistors. In the 74 series this is the 7432 — 4 two-input OR gates.

Two NANDs act as inverters for A and B, and a third combines them by De Morgan: ¬(¬A · ¬B) = A + B.

OR is built as NOR plus an inverter: about 6 transistors.

XOR (Exclusive OR)

The XOR (Exclusive OR) circuit made from 4 NAND gates

From NAND: 4 gates, ≈ 16 transistors.

In silicon: ≈ 12 transistors. In the 74 series this is the 7486 — 4 two-input XOR gates.

The first NAND computes ¬(A·B), the next two mix it with A and B, and the last one assembles the difference: 1 only when the inputs differ.

Silicon XOR is not built from four NANDs: an optimised circuit takes about 12 transistors.

NOR

The NOR circuit made from 4 NAND gates

From NAND: 4 gates, ≈ 16 transistors.

In silicon: ≈ 4 transistors. In the 74 series this is the 7402 — 4 two-input NOR gates.

Two NANDs invert A and B, a third computes their AND, and a fourth inverts the result. The output is 1 only when both inputs are 0.

CMOS NOR takes 4 transistors: two p-channel in series and two n-channel in parallel.

MUX (Multiplexer 2→1)

The MUX (Multiplexer 2→1) circuit made from 4 NAND gates

From NAND: 4 gates, ≈ 16 transistors.

In silicon: ≈ 12 transistors. In the 74 series this is the 74HC157 — 4 two-to-one multiplexers.

A NAND with tied inputs makes ¬Sel; two NANDs prepare ¬(A·¬Sel) and ¬(B·Sel); the last NAND combines them by De Morgan and selects the input with Sel.

A 2-to-1 multiplexer in silicon uses transmission gates: about 12 transistors.

Half Adder

The Half Adder circuit made from 5 NAND gates

From NAND: 5 gates, ≈ 20 transistors.

In silicon: ≈ 18 transistors.

Five NANDs: four build the XOR for the sum, and the fifth inverts the shared NAND(A,B) to produce the carry. One gate serves two formulas.

A half adder in silicon takes about 18 transistors; it has no separate chip and exists inside the 74HC283 adder.

Full Adder

The Full Adder circuit made from 9 NAND gates

From NAND: 9 gates, ≈ 36 transistors.

In silicon: ≈ 28 transistors. In the 74 series this is the 74HC283 — 4-bit adder.

Two XORs in a row add A, B, and Cin. The carry is "at least two of three": a ninth gate combines the shared NAND(A,B) with NAND(X,Cin).

A full adder is optimised to about 28 transistors. In the 74 series this is the four-bit 74HC283 — four such blocks in one package.

DFF (D Flip-Flop)

The DFF (D Flip-Flop) circuit made from 6 NAND gates

From NAND: 6 gates, ≈ 24 transistors.

In silicon: ≈ 24 transistors. In the 74 series this is the 7474 — 2 edge-triggered D flip-flops.

Six NANDs: two turn D into the pair D and ¬D, two pass them to the latch only while the clock is high, and two hold the result. While Clock=0 the data is locked; on the rising edge the value of D reaches Q.

A D flip-flop in silicon takes about 24 transistors. In the 74 series this is the 7474: two flip-flops in one package.

NAND

Primitive: 4 transistors in CMOS. There is no circuit made from NAND — it is the brick itself.

In the 74 series: the 7400 — 4 two-input NAND gates.

NAND is the primitive the course starts from. Every other element on this page is built from it, and in CMOS it costs four transistors.

In the 74 series it is the 7400: four two-input NAND gates in one package. Building NAND out of NAND makes no sense — it is the brick itself.

Why one NAND is enough

NAND is functionally complete: NOT, AND, and OR can all be expressed through it, and any digital circuit, including a processor, can be built from those. That is why the course starts with NAND and only then unlocks the other elements.

Build your first NAND in level 2 →