Two's Complement: How a Byte Stores Negative Numbers

There is no minus sign in a wire. Only high and low voltage, 1 and 0. So where does −5 come from in an 8-bit processor if a byte can only hold 0 to 255? Engineers invented a convention called two's complement. It turned out so elegant that all modern processors store negative numbers exactly this way.

5 invert (NOT) +1 00000101 11111010 11111011 this is +5 this is −5 Check: 5 + (−5) = 00000101 + 11111011 = 1 00000000 The ninth bit (carry) is dropped — 00000000 remains, zero. The identity holds
Two's complement of −5: invert all eight bits of five and add 1. Adding +5 and −5 gives zero — the sign "works" in an ordinary adder

The problem: no minus in a wire

The simplest fix would be to give one bit to the sign: high bit 0 — positive, 1 — negative. Such "sign-magnitude" is readable for humans but breaks the hardware: adding +5 and −5 in sign-magnitude does not give zero, and the adder would need separate sign logic — a different, slower path.

Two's complement eliminates the problem at the root: negative numbers are arranged so that an ordinary adder adds them correctly without ever knowing about signs. A separate subtractor in the processor is not needed at all.

How to get −N: invert and add one

The rule for an 8-bit byte:

1. Write N in plain binary: 5 = 00000101.
2. Invert all eight bits (NOT of each): 11111010.
3. Add one: 11111010 + 1 = 11111011.

Done: 11111011 is −5. Converting back is the same: invert and add 1 (11111011 → 00000100 → 00000101 = 5). The high bit of negative numbers is always 1 — it "for free" doubles as the sign indicator, and it is exactly what the Negative flag from the status flags article checks.

The value wheel: −128 to 127

The easiest way to feel two's complement is as a wheel: a byte holds 256 values, and we simply cut the circle not 0…255 but like this: 0…127 are positive, then 128…255 read as −128…−1. Adding one moves you along the wheel; 127 + 1 = −128 means you "drove over" the boundary — that is signed overflow (real processors catch it with a dedicated flag).

Because of this layout the range is asymmetric: 127 positive values, 128 negative ones. There is a single zero — one representation, unlike sign-magnitude where +0 and −0 were written differently.

Subtraction via addition

Now the main consequence: A − B = A + (−B). To subtract 10 from 25, an 8-bit ALU takes −10 (11110110), feeds both bytes into the very same adder and gets 00001111 — fifteen. No new circuitry: the same full adders that add ordinary numbers.

That is exactly how the "Negative Check" level works: the program computes 5 − 10, gets 251 (= −5 in two's complement), and the N and Z flags show the result went negative. The assembler uses the same trick: there is no subtract instruction — just ADD of a negative number.

You can check any byte's two's complement in the number base converter — it shows the sign and the range.

Test yourself

How do you write −1 in one byte's two's complement?

Inverting 00000001 gives 11111110, add 1 — 11111111. Minus one is all ones.

Why is no separate subtractor circuit needed?

Because A − B = A + (−B), and −B is just an inversion plus one. An ordinary adder handles that correctly with no sign logic at all.

What happens if you add 1 to 127 in a signed byte?

You get −128: the wheel has overflowed. There are exactly 127 positive values, and stepping over the boundary "jumps" to the very bottom of the range.

Try it in the simulator →