Level 67: Knight Rider Pipeline

Open level →

The task

Goal: run the course finale — the same "Knight Rider" program as on level 59, but on the full pipelined core: your forwarding, load bubble and flush all work with enables=1. Watch the hazard prices live: every taken branch costs 2 cycles (flushing two ghosts), every load-use 1 — and yet the pipeline beats the single-cycle machine because the cycle got several times shorter. Compare the metrics (CPI ≈ 1.53 vs 1.00) and predict the number of cycles to the halt. Passing proves the integrity of the level-66 hardware — exact-step has already passed; after the check, the ZIP button ships the pipelined core to the Tang Nano 9K. This is the last level of the Ershov Computer: from a wire to a pipelined processor on an FPGA.

The course finale — the same "Knight Rider" program as on level 59, but on the full pipelined core: your forwarding, load bubble and flush all work with the enables at 1. Watch the hazard prices live: every taken branch costs 2 cycles (flushing two ghosts), every load-use — 1. Tasks:

  1. Paste knight_rider from level 59. The LED base via lui x10, 0xFFFFF, two "there and back" sweeps over eight lights, the halt on .end.
  2. Predict the cycle count. 115 instructions + 4 fill + 18 flush cycles (9 taken branches × 2); KR has no load-use. The stop word adds no cycle. Count it yourself — any number is calibration.
  3. Check against the mask. The run goes on the pipeline engine: the mask verifies the registers, PC, counters (retired/cycles/nstall/nflush) and 30 MMIO pairs — the values match level 59, the cycles do not.
  4. Read the CPI table. Pipeline: 176/115 ≈ 1.53. The single-cycle core on the same words: 115/115 = 1.00. With a 5 times shorter cycle the speedup is ≈ 3.3x.
  5. Take the ZIP. After passing, the export button ships the level-66 pipeline core (PipeTop32, the enables tied to 1) plus the program ROM — a Gowin project for the Tang Nano 9K.

Solution for self-checking

Write the program yourself first (the listing is in the level-59 guide). Below — the checkpoints.

What you should get: Knight Rider runs on the pipeline: 115 retirements, 176 cycles (4 fill + 4 drain + 58 flush slots), nstall = 0; the mask compares registers, PC, counters and 30 MMIO pairs with level 59, the final LED = 1; CPI ≈ 1.53 against 1.00 for the single-cycle core.

Step 1 — the checkpoint numbers. 115 retires, 176 cycles (115 + 4 fill + 4 drain + 18 flush = 176), nstall=0, nflush=58 (58 slots = 29 flushes × 2; one taken is the jump to halt). LED = 1 at the end.

Step 2 — the MMIO trace. The same 30 writes as on level 59 (two sweeps there and back: 1→128 and 128→1), but pipelined cycles: the first write lands on cycle 10, not 4.

Step 3 — the CPI. Pipeline 176/115 ≈ 1.53; single-cycle 115/115 = 1.00. The speedup at a 5 times shorter cycle: 5 / 1.53 ≈ 3.3x — the pipeline wins because the critical path is compressed to a single stage.

Check yourself

Why does the pipeline win even though it takes more cycles?

Compare the products, not the cycles: 176 short cycles against 115 long ones. With the cycle 5 times shorter the speedup is 5 / 1.53 ≈ 3.3× — the critical path shrank to one stage, and fill/drain with hazards do not eat that margin.