Level 64: The Short Path

The task

Goal: build the Fwd32 block (comparing rs numbers against rdM/rdW, EX/MEM priority over MEM/WB, x0 and lw-from-EX/MEM exceptions), extend IdEx32 with the rs1/rs2 numbers (+10 bits), and add EX operand muxes gated by fwd_en. The level-62 pipeline handled RAW dependencies with honest latency: an instruction read registers in ID while results were written in WB — the value arrived three cycles later, and a close dependency read garbage. You close the hazard with a short path — forwarding: the ALU result from EX/MEM and the write value from MEM/WB feed the next instruction's ALU inputs directly, bypassing the regfile. The manual run on the pipeline engine shows the difference: the golden pays no cycle for RAW, while "hardware with fwd_en=0" reads garbage. Acceptance is exact-step against the engine plus the fwd_en=0 negative.

The level-62 pipeline resolves RAW dependencies with honest latency: an instruction reads registers in ID and writes its result in WB — the value only arrives at distance 4. A close dependency reads garbage. You close the hazard with a short path — forwarding: the ALU result from EX/MEM and the write value from MEM/WB feed the next instruction's ALU inputs directly, bypassing the regfile.

This is a hardware level: editable files are pipetop.v, fwd.v, idex.v; the level-62 pipeline registers and all level-58 core blocks are read-only. Tasks:

1. Extend IdEx32 to 165 bits. To the level-62 layout add the numbers rs1N[9:5] and rs2N[4:0] — not the values, the numbers from Decoder32: the forwarding block will compare them.
2. Build Fwd32 (fwd.v). Compare the operand numbers against rdM (EX/MEM) and rdW (MEM/WB): fwdX=01 when regWriteM & rdM!=0 & !memReadM, fwdX=10 when regWriteW & rdW!=0. Priority — EX/MEM over MEM/WB: the fresher value wins. Exceptions: x0 is never forwarded, lw from EX/MEM is not forwarded (the data is not there yet — level 65 fixes that).
3. Add the EX operand muxes. Per bit, three shoulders: the payload / alu_y from EX/MEM / wdata from MEM/WB; every shoulder bit is gated by fwd_en. Use the forwarded values everywhere: Alu32, the eight I-modules, the alusrc mux, store_val.
4. Close distance 3. Distances 1–2 are covered by forwarding, 4+ by the regfile; distance 3 needs write-first: if rdWb matches the register being read and regWriteW holds, read wdataWb instead of the regfile q (also under fwd_en).
5. Run against the golden. The manual run goes on the pipeline engine: the RAW program flows without bubbles (15 instructions, 19 cycles), and with fwd_en=0 the registers fill with garbage.